One or more aspects of the present invention relate in general to the field of shared-memory multiprocessor computer systems, and in particular to operating a second level translation lookaside buffer in a multiprocessor computer system.
A multiprocessor computer system allows the running of simultaneously multiple virtual processors, in which each virtual processor represents multiple threads. The virtual processors are being dispatched to one of the available physical processors in a time slice mode. Whenever a virtual processor is being removed from a physical processor, in order to dispatch another one, all logical states of all threads of this virtual processor are saved and retained in a state descriptor field residing in main memory, and the logical states of the new virtual processor to be dispatched are loaded from this processor's state descriptor field. While the logical states of each virtual processor are saved and retained in this processor's state descriptor field, address translations created by this processor's threads are stored in the second level translation lookaside buffer under this processor's state descriptor identification and under the respective thread identification.
The second level translation lookaside buffer is able to simultaneously hold address translations for a certain number of different virtual processors, each supporting a certain number of threads. The state descriptor identification and thread identification are to be kept in each second level translation lookaside buffer entry as tag information in order to correctly associate second level translation lookaside buffer entries with virtual processors and threads.
Whenever second level translation lookaside buffer entries associated with a certain state descriptor identification and thread identification are going to be invalidated in the second level translation lookaside buffer, e.g. as result of a thread executing “Purge translation lookaside buffer (TLB)” or in order to reuse a state descriptor identification and thread identification based on a least reused unit (LRU) scheme, it is necessary for state of the art implementations to inspect all second level translation lookaside buffer entries to determine whether their state descriptor identification and thread identification match the one to be invalidated, and in case it does, to turn the valid bit of the respective second level translation lookaside buffer entry off.
In U.S. Pat. No. 6,766,434 B2 “METHOD FOR SHARING A TRANSLATION LOOKASIDE BUFFER BETWEEN CPUS” by Gaertner et al., which is incorporated herein by reference in its entirety, shared-memory multiprocessor systems, such as IBM ESA/390 or RS/6000 systems, are disclosed. In a disclosed embodiment, a second-level translation lookaside buffer is shared between several central processing units. The second-level translation lookaside buffer comprises several small arrays dedicated to particular CPUs, providing an interface to a major array, which is shared between the CPUs. The dedicated arrays are required to fulfill the architected constrains and link several CPUs to the commonly used shared array.